1. Field of the Invention
The present invention relates to a semiconductor device and more specifically to a stack-type semiconductor device with a plurality of semiconductor chips stacked on top of each other.
2. Description of the Related Art
In recent years, smaller semiconductor devices have been required in keeping with the current trend towards a reduction in the size of the housing of products such as mobile telephones. A package that is the same size as the semiconductor chip has been developed to fit in such a small housing. Incidentally, a semiconductor device of this type was referred to as a CSP (Chip Size Package). On the other hand, a semiconductor device has been suggested that has a stacked package structure in which a plurality of semiconductor chips are stacked on top of each other to provide storage capacity and a number of electronic circuit functions.
FIG. 1 is a cross sectional view illustrating an example of a prior art semiconductor device, and FIG. 2 is a plan view illustrating a first semiconductor chip for use in the prior art semiconductor device. For example, as shown in FIG. 1, such a semiconductor device, reduced in size and provided with multi-functions, is composed of a second semiconductor chip 21 and a first semiconductor chip 22. The semiconductor chip 21 has a plurality of electrode pads 24 arranged side by side along opposite sides of the upper surface thereof. The semiconductor chip 22 has a plurality of electrode pads 27 and relay terminals 25 arranged side by side along opposite sides. The second semiconductor chip 21 is designed to be mounted on top of the first semiconductor chip 22 and fixed in place with an adhesive.
In addition, the first semiconductor chip 22, on top of which the second semiconductor chip 21 is mounted, is mounted on an insulating printed circuit board 23 and fixed with an adhesive. This structure requires long wires, or long thin metal wires, to connect the conductive pads 26 and the electrode pads 24 electrically. An increase in the length of the wires would present a problem with respect to contact with the semiconductor chips or other wires.
In this regard, the relay terminals 25 are provided in addition to the ordinary electrode pads 27 on top of the first semiconductor chip 22. Wires 29 connect between the conductive pads 26 and the relay terminals 25, and wires 28 connect between the relay terminals 25 and the electrode pads 24. In this way the conductive pads 26 and the electrode pads 24 are connected.
Incidentally, external wiring terminals 31 are connected to a trace layer 30 of the insulating printed circuit board 23 and adapted to protrude through the lower surface of the insulating printed circuit board 23. The external wiring terminals 31 are connected to the conductive pads 26 of the printed circuit board 23 within the housing. The trace layer 30 and the conductive pads 26 are connected to each other through via-holes 33. In addition, the space of the mold, including the wires 28 and 29 and the first semiconductor chip 22 and the second semiconductor chip 21, is filled with a resin to form a resin body 32. This is done to prevent the entry of moisture from the outside and to protect against external mechanical forces. As described above, the prior art semiconductor device is characterized by being the same size as the insulating printed circuit board 23 that is slightly greater in size than the first semiconductor chip 22. In this way the size of the semiconductor device is reduced.
However, since the aforementioned semiconductor device has the elongated relay terminals 25 on opposite sides of the first semiconductor chip 22, the first semiconductor chip 22 cannot be reduced in size. In other words, because it is not possible to reduce the size of the first semiconductor chip 22 it is impossible to reduce the size of the insulating printed circuit board 23. Consequently, a further reduction in the size of the semiconductor device becomes a problem.
Also, suppose that the first semiconductor chip 22 is a storage element. In this case such a semiconductor chip, which is larger in capacity and size than is necessary, would have to be used to provide the relay terminals 25. Consequently, there is a further problem in that the semiconductor device becomes expensive.
It is therefore an object of the present invention to provide a semiconductor device that is reduced in size and cost.
A semiconductor device according to the present invention comprises a printed circuit board having a plurality of electrically conductive pads on an upper surface thereof. A first semiconductor chip is mounted on said printed circuit board. A second semiconductor chip is mounted on said first semiconductor chip so as to be displaced in a special direction from the center of said first semiconductor chip. Said second semiconductor chip has a length in said special direction smaller than said first semiconductor chip. A first area of said first semiconductor chip which is not covered by said second semiconductor chip in said special direction is smaller than a second area of said first semiconductor chip which is not covered by said second semiconductor chip in a direction contrary to said special direction. First electrode pads are arranged along both sides of said first semiconductor chip on said first area and said second area, in which said both sides of said first semiconductor chip are apart from each other in said special direction. Second electrode pads are arranged along both sides of said second semiconductor chip, in which said both sides of said second semiconductor chip are apart from each other in said special direction. A plurality of relay terminals are arranged along a side on said second area of said first semiconductor chip. First metal wires connect said first electrode pads and said electrically conductive pads and second metal wires connect said electrically conductive pads and said second electrode pads which are arranged along a side of said second semiconductor chip in said special direction. Third metal wires connect said electrically conductive pads and said relay terminals and fourth metal wires connect said relay terminals and said second electrode pads which are arranged along a side of said second semiconductor chip in a direction contrary to said special direction. External terminals protrudes from a lower surface of said printed circuit board and are connected to said electrically conductive pads. Said electrically conductive pads are arranged corresponding to said first electrode pads and said second electrode pads.
In addition, it is preferable that the relay terminals and the first electrode pads are formed side by side. The relay terminals are preferably formed in the shape of an elongated rectangle.
On the other hand, the first, second, third and fourth thin metal wires are preferably formed of gold (Au). Furthermore, the external wiring terminals are preferably made of a solder material formed in the shape of a sphere.
As described above, the present invention provides the following effects. The second semiconductor chip is mounted on the first semiconductor chip and it is displaced in a special direction from the center of the first semiconductor chip. As a result, the need for relay terminals on the side of the first semiconductor chip, toward which the second semiconductor chip has been displaced, is obviated. This allows the first semiconductor chip to be reduced in size by the area that would otherwise be occupied by the relay terminals, and thereby reduces the size of the semiconductor device.
The present invention obviates the need for a semiconductor chip that has an unnecessarily large storage capacity to be used as the first semiconductor chip. As a result, a less expensive semiconductor chip with a suitable capacity can be used. Thus, the present invention also provides a semiconductor device at lower cost.